Cours:Vhdl : Différence entre versions
(→interface pour le bus avalon) |
(→irq avec le nios2) |
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| Ligne 29 : | Ligne 29 : | ||
===hardware=== | ===hardware=== | ||
| − | < | + | <source lang=vhdl> |
library ieee; | library ieee; | ||
use ieee.std_logic_1164.all; | use ieee.std_logic_1164.all; | ||
Version du 5 novembre 2025 à 13:40
Sommaire
Nios 2
interface pour le bus avalon
hardware
entity customPeriph is
port (
clk : in std_logic;
reset_n : in std_logic;
address : in std_logic_vector(1 downto 0);
write : in std_logic;
read : in std_logic;
chipselect : in std_logic;
writedata : in std_logic_vector(31 downto 0);
readdata : out std_logic_vector(31 downto 0)
);
end entity customPeriph;
software
IOWR(CUSTOM_0_BASE,regNumber,value);
irq avec le nios2
hardware
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_unsigned.all;
entity customIRQ is
port (
clk : in std_logic;
reset_n : in std_logic;
address : in std_logic_vector(1 downto 0);
write : in std_logic;
read : in std_logic;
chipselect : in std_logic;
writedata : in std_logic_vector(31 downto 0);
irq : out std_logic;
readdata : out std_logic_vector(31 downto 0);
bps : in std_logic_vector(9 downto 0)
);
end entity customIRQ;
architecture rtl of customIRQ is
signal s_irq : std_logic;
signal input : std_logic_vector(9 downto 0);
signal input_reg : std_logic_vector(9 downto 0);
signal rd_data : std_logic_vector(31 downto 0);
begin
--------------------------------------------------------
-- Processus principal : écriture des registres
--------------------------------------------------------
process(clk, reset_n)
begin
if rising_edge(clk) then
if chipselect = '1' and write = '1' then
s_irq <= '0';
elsif input /= input_reg then
s_irq <= '1';
end if;
end if;
end process;
irq <= s_irq;
end architecture rtl;
PIO
interruptions
static void myISR(void * context,alt_u32 id)
{
// terminer par l'acquittement de l'interruption
IOWR_ALTERA_AVALON_PIO_EDGE_CAP(PIO_0_BASE, 0);
IORD_ALTERA_AVALON_PIO_EDGE_CAP(PIO_0_BASE);
}
int main()
{
// choix des PIO déclenchant l'interruption
IOWR_ALTERA_AVALON_PIO_IRQ_MASK(PIO_0_BASE, 0xff);
// initialisation des fronts
IOWR_ALTERA_AVALON_PIO_EDGE_CAP(PIO_0_BASE, 0);
alt_ic_isr_register(PIO_0_IRQ_INTERRUPT_CONTROLLER_ID, PIO_0_IRQ ,(void *) myISR,NULL,NULL);
while (1)
{
}
}