Cours:De0NanoSoc

Ecriture dans la DDR

• dans uboot

mw 0xFFC25080 0x1F0 mw 0xFFC2505C 0xA

• sur linux

memtool mw -l 0xFFC25080 0x1F0

https://www.reddit.com/r/FPGA/comments/12mg5su/having_issues_writing_data_from_fpga_to_hps_using/?tl=fr

https://people.ece.cornell.edu/land/courses/ece5760/DE1_SOC/cv_5_HPS_tech_ref.pdf

• fpga

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity fpga_dma_rgb32_simple is
  port (
    clk   : in  std_logic;
    reset : in  std_logic;

    -- Avalon-MM master
    avm_address     : out std_logic_vector(31 downto 0);
    avm_write       : out std_logic;
    avm_writedata   : out std_logic_vector(31 downto 0);
    avm_waitrequest : in  std_logic
  );
end entity;

architecture rtl of fpga_dma_rgb32_simple is

  constant BASE_ADDR    : unsigned(31 downto 0) := x"3FB00000";
  constant WIDTH        : integer := 640;
  constant HEIGHT       : integer := 480;
  constant TOTAL_PIXELS : integer := WIDTH * HEIGHT; -- 307200

  signal pixel_index : integer range 0 to TOTAL_PIXELS-1 := 0;
  signal addr        : unsigned(31 downto 0);
  signal write_reg   : std_logic := '0';

  -- Pattern RGB32 (XRGB8888)
  signal r, g, b    : unsigned(7 downto 0);
  signal pixel32    : unsigned(31 downto 0);

begin

  --------------------------------------------------------------------
  -- Générateur simple de pattern
  --------------------------------------------------------------------
  r <= to_unsigned((pixel_index mod WIDTH) * 255 / WIDTH, 8);
  g <= to_unsigned((pixel_index / WIDTH) * 255 / HEIGHT, 8);
  b <= to_unsigned(128, 8);

--  pixel32 <= x"00" & r & g & b;  -- XRGB8888
  pixel32 <= x"AAAAAAAA";  -- XRGB8888

  avm_writedata <= std_logic_vector(pixel32);

  --------------------------------------------------------------------
  -- Adresse courante
  --------------------------------------------------------------------
  addr <= BASE_ADDR + to_unsigned(pixel_index * 4, 32);

  avm_address <= std_logic_vector(addr);
  avm_write   <= write_reg;
  --------------------------------------------------------------------
  -- FSM simple
  --------------------------------------------------------------------
  process(clk)
  begin
    if rising_edge(clk) then
        if avm_waitrequest = '0' then
          write_reg <= '1';

          pixel_index <= pixel_index + 1;

          -- boucle image
          if pixel_index = TOTAL_PIXELS-1 then
            pixel_index <= 0;
          end if;
        else
          write_reg <= '0';
        end if;
    end if;
  end process;

end architecture;

I2C

Media:DE0-Nano-SoC_Schematic.pdf

• on utilisera le bus i2c1
• la vitesse est de 100kHz
  • dans le fichier device-tree
  • modifier speed-mode = <0x00>
    • 0x00 = Standard mode (100 kHz)
    • 0x01 = Fast mode (400 kHz)
• broches
  • sur le connecteur LTC
  • ATTENTION : il faut mettre des résistances de Pull-Up !!!