Cours:Vhdl

Nios 2

interface pour le bus avalon

hardware

entity customPeriph is
    port (
        clk         : in  std_logic;
        reset_n     : in  std_logic;
        address     : in  std_logic_vector(1 downto 0);
        write       : in  std_logic;
        read        : in  std_logic;
        chipselect  : in  std_logic;
        writedata   : in  std_logic_vector(31 downto 0);
        readdata    : out std_logic_vector(31 downto 0)
    );
end entity customPeriph;

software

IOWR(CUSTOM_0_BASE,regNumber,value);

pio

Media:Nios_pio.pdf

irq avec le nios2

hardware

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_unsigned.all;


entity customIRQ is
    port (
        clk         : in  std_logic;
        reset_n     : in  std_logic;
        address     : in  std_logic_vector(1 downto 0);
        write       : in  std_logic;
        read        : in  std_logic;
        chipselect  : in  std_logic;
        writedata   : in  std_logic_vector(31 downto 0);
        irq         : out std_logic;
        readdata    : out std_logic_vector(31 downto 0)
    );
end entity customIRQ;

architecture rtl of customIRQ is

    signal s_irq     : std_logic;
	 
begin

    process(clk, reset_n)
    begin
        if rising_edge(clk) then
            -- prévoir un moyen pour acquitter l'irq
            -- par exemple avec une écriture sur un registre particulier
            if chipselect = '1' and write = '1' then
                s_irq <= '0';
	    elsif "condition pour déclencher une interruption" then
		s_irq <= '1';
            end if;
        end if;
    end process;
    irq <= s_irq;
end architecture rtl;

software

#include "sys/stdio.h"
#include <unistd.h>
#include "io.h"
#include "system.h"
#include "sys/alt_irq.h"
#include "drivers/inc/altera_avalon_pio_regs.h"

volatile int n=0;


static void myISR(void * context,alt_u32 id)
{
  // terminer par l'acquittement de l'interruption
  IOWR(BPS_0_BASE,0,0);
}

int main()
{ 
  // acquitter l'interruption si elle est déjà déclenchée
  IOWR(BPS_0_BASE,0,0);
  alt_ic_isr_register(BPS_0_IRQ_INTERRUPT_CONTROLLER_ID, BPS_0_IRQ ,(void *) myISR,NULL,NULL);

  while (1)
  {
  }
}

PIO

interruptions

static void myISR(void * context,alt_u32 id)
{
        // terminer par l'acquittement de l'interruption
	IOWR_ALTERA_AVALON_PIO_EDGE_CAP(PIO_0_BASE, 0);
	IORD_ALTERA_AVALON_PIO_EDGE_CAP(PIO_0_BASE);
}

int main()
{ 
  // choix des PIO déclenchant l'interruption
  IOWR_ALTERA_AVALON_PIO_IRQ_MASK(PIO_0_BASE, 0xff);
  // initialisation des fronts
  IOWR_ALTERA_AVALON_PIO_EDGE_CAP(PIO_0_BASE, 0);
  alt_ic_isr_register(PIO_0_IRQ_INTERRUPT_CONTROLLER_ID, PIO_0_IRQ ,(void *) myISR,NULL,NULL);
  while (1)
  {
  }
}

de0 nano soc

• https://www.rocketboards.org/foswiki/Projects/TouchScreenLCDForAlteraSoC
• https://github.com/qtplatz/socfpga_debian

• https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=941&PartNo=4#contents
• https://github.com/ikwzm/FPGA-SoC-U-Boot-DE0-Nano-SoC
• https://github.com/ikwzm/FPGA-SoC-Linux/blob/master/doc/install/format-disk-de0-nano-soc.md
• https://forum.digikey.com/t/debian-getting-started-with-the-de0-nano-soc-kit/12434

sudo apt-get update sudo apt-get install -y build-essential git bc bison flex \

 libssl-dev libncurses5-dev libncursesw5-dev \
 lzop u-boot-tools device-tree-compiler

Debian Jessie 8.0 rootfs The steps required to boot Debian are: This project creates a working install of Debian Jessie 8 on Altera SoC First create a working Yocto image Download the attached debian8 image file ( debian8.img.gz) Decompress the image using: $ gzip -d debian8.img.gz

Use DD to copy the image over the second partition of your sd card. If your card is /dev/mmcblk0 then this would be: $ dd if=debian8.img of=/dev/sdb2

Root password is "debian". Ethernet is preconfigured with dhcp. This can be changed through the normal debian method. Access by UART